All transistors consume power in two distinct ways: (1) during an OFF state (i.e., standby), when a leakage current flows through the transistor, even though it is not needed, and (2) during an ON/OFF switching operation, when surrounding circuits are charged and discharged due to a voltage change on the transistor that changes the transistor state between OFF and ON. To reduce power consumption, it is desirable to reduce both the leakage current present during the OFF state and the voltage swing used for the ON/OFF switching operation as much as possible. The ON/OFF voltage swing may be characterized by the subthreshold slope (“SS”), also sometimes referred to as the subthreshold swing. Conventional metal-oxide-silicon field-effect transistors (“MOSFETs”) are fundamentally limited to a lower bound SS of 60 mV/decade (at room temperature) that cannot be reduced.
TFETs have been designed to reduce the SS beyond this limit and, thereby, to allow further reductions in the ON/OFF voltage swing. In TFETs, the cold injection of valence electrons located in a source contact into the conduction band of a drain contact (or vice versa) does not impose any theoretical lower limit to the SS. Most TFET designs, however, are based on lateral tunneling and suffer from relatively low ON currents, due to a small available tunneling area. More recently, TFETs using a vertical band-to-band tunneling (“BTBT”) approach, similar to the gate induced drain leakage (“GIDL”) mechanism present in conventional MOSFETs, have been proposed. Vertical BTBT has the advantage of a large tunneling area, proportional to the gate length of the transistor, that should provide large ON currents. Due to their potential power savings, vertical TFETs have sometimes been referred to as “green-FETs,” or “gFETs.”
Various TFET designs and other background principles are described in: J. Appenzeller et al., “Band-to-Band Tunneling in Carbon Nanotube Field-Effect Transistors,” 93 Physics Rev. Letters 196805 (2004); A. Bowonder et al. “Low-Voltage Green Transistor Using Ultra Shallow Junction and Heterotunneling,” 8th Int'l Workshop on Junction Tech. 93-96 (2008); W. Y. Choi et al., “Tunneling Field-Effect Transistors (TFETs) with Subthreshold Swing (SS) Less Than 60 mV/dec,” 28 Electron Device Letters 743-745 (2007); C. Hu, “Green Transistor as a Solution to the IC Power Crisis,” 9th Intl Conf. on Solid-State & Integrated-Circuit Tech. 16-23 (2008); C. Hu et al, “Green Transistor—A VDD Scaling Path for Future Low Power ICs,” Int'l Symp. on VLSI Tech., Sys. & Applications 14-15, 21-23 (2008); T. Krishnamohan et al., “Doublegate Strained-Ge Heterostructure Tunneling FET (TFET) with Record High Drive Currents and <60 mV/dec Subthreshold Slope,” Electron Devices Meeting 1-3 (2008); M. Luisier et al., “Atomistic Full-Band Design Study of InAs Band-to-Band Tunneling Field-Effect Transistors,” 30 IEEE Electron Device Letters 602-604 (2009); and M. Luisier et al., “Performance Comparisons of Tunneling Field-Effect Transistors Made of InSb, Carbon, and GaSb—InAs Broken Gap Heterostructures,” Electron Devices Meeting (2009). The entire disclosures of each of the above listed references is expressly incorporated herein by reference. This listing is not intended as a representation that a complete search of all relevant prior art has been conducted or that no better reference than those listed above exist; nor should any such representation be inferred.